1. Field of the Invention
This invention relates to a PGA (Pin Grid Array) package type semiconductor device, and more particularly to a technique for preventing crosstalk noise from occurrence in a PGA package type semiconductor device, which has a plurality of lead pins and operates at high frequency.
2. Description of the Related Art
PGA package type semiconductor devices are disclosed, for example, in "The First VLSI PACKAGING WORKSHOP of Japan" UNITED STATES DEPARTMENT OF COMMERCE NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY and THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, INC. Nov. 30, Dec. 1 and 2, 1992 "DEVELOPMENT OF HIGH DENSITY DOWN-SIZING PGA BY SUPER FINE PITCH PATTERN FOR HIGH SPEED APPLICATION" Miura et at. pp. 67-70.
FIG. 1A is a perspective view, showing a general PGA package type semiconductor device. FIG. 1B is an enlarged plan view, showing that semiconductor chip-mounting portion of the package which is enclosed by broken line 40 in FIG. 1A, and its peripheral portion. As is shown in FIG. 1A, a plurality of pins 31 are arranged on a ceramic body 30 along its peripheral portion. As is shown in FIG. 1B, a portion 32 mounting a semiconductor chip 35 is provided at a central portion of the body 30, and end portions of lead wires 33 extending in the body 30 and connected to the lead pins 31 are exposed around the chip-mounting portion 32. The lead wires 33 each consist of two layers formed in the body 30, so as to be connected to lots of lead pins 31. A chip-mounting metal plate 34 has one surface coated with gold, and the other surface adhered to the chip-mounting portion 32 by means of a conductive adhesive agent. The semiconductor chip 35 is adhered to the gold-coated surface of the chip-mounting plate 34 by means of a conductive adhesive agent. Bonding wires 36 connect the lead wires 33 to a peripheral portion of the gold-coated surface of the chip-mounting plate 34, and also connect the wires 33 to electrodes (not shown) provided on a backside of the semiconductor chip 35. Thus, the electrodes are electrically connected to the lead pins 31.
In the case where the semiconductor chip 35 operates at high frequency, crosstalk noise is liable to occur in an electrical signal passing between each adjacent pair of the lead pins 31, due to capacitive coupling of the lead wires 33 connected by each of the lead pins 31. There is a known technique for preventing occurrence of crosstalk noise by providing another lead pin, to be supplied with a power source potential, between each adjacent pair of the lead pins, thus making it have a crosstalk-shielding function.
However, in the above-described structure, lots of lead pins (specifically, the number of the lead pins is equal to substantially twice the number of electrical signals required) for supplying a power source potential must be employed. Accordingly, where a great number of electrical signals are necessary to realize a multifunctional semiconductor chip, the number of the lead pins for supplying the power source potential must be increased, resulting in an increase in package size.